The trend toward higher functionality, larger scale and faster speed in LSI (Large-Scale Integration) has been accompanied by greater difficulty in terms of verifying all of the functions of an LSI chip using just the functions of an LSI tester. Moreover, LSI testers are high in cost. Rather than enhancing the functionality of an LSI tester, therefore, it has been contemplated to lower testing cost by using a DUT (Device Under Test) board that makes it possible to insert a DUT between an LSI tester and a DUT such as an LSI chip. With regard to a DUT board of this kind, there are increasing instances where various communication devices such as a CPU (Central Processing Unit) and memory are mounted on the DUT board that electrically connects the LSI tester and the DUT, and the functions of the DUT are checked by causing the communication devices and DUT to communicate. Against this background, there are cases where the configuration of the DUT board is much more complicated than in the past. It should be noted that with an ordinary DUT board, the signal terminals of the DUT and the signal terminals of the LSI tester are just connected through wiring, and whether the connections are correct or not is determined using the measurement function of the LSI tester.
[Patent Document 1] Japanese Utility Model Kokai Publication JP-U-6-28766A
[Patent Document 2] Japanese Patent Kokai Publication No. JP-H04-159752A